Gal Gilat – KaiSemi

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Recent Posts

• AUTOMATED CONVERSION OF FPGA-TO-ASIC
• How does Zero-NRE model for FPGA-to-ASIC conversions work?
• Prototyping with FPGA before converting to ASIC
• KaiSemi Hardening Vs. FPGA Flexibiliy
• FPGA Conversions: Why switch from FPGA to ASIC

Kaisemi Blog

• AUTOMATED CONVERSION OF FPGA-TO-ASIC March 16, 2011
  • From FPGA netlist directly to ASIC gate-level netlist • Targeting standard fab processes • Combined with full turnkey ASIC flow • Tool database includes multiple proven standard-cell libraries of various standard fab processes • Tool database libraries are preinstalled and used by the automated conversion • For the FPGA area overhead: Same functionality lo […]
  Kaisemi Team
• How does Zero-NRE model for FPGA-to-ASIC conversions work?… March 7, 2011
  …And how you can afford it. The “Zero-NRE” model means that the customer doesn’t pay in advance for the one time design cost known also as NRE (Non Recurrent Engineering). The customer places a purchase order for the chips as if they were “off-the-shelf” chips without considering NRE. Technically, our ability to offer a Zero-NRE model is [...] […]
  Kaisemi Team
• The different Processes of Chip Production November 30, 2010
  Though FPGA and ASIC designs are quite different, their concept is similar since they both implement logic HW applications. Actually FPGA is some kind of ready-made ASIC with a programmable design, and the only difference between it and a regular full ASIC chip is the fact its logical functions are configurable by the user (FPGA [...] […]
  Kaisemi Team
• Prototyping with FPGA before converting to ASIC September 12, 2010
  The time-to-market is one of the most important factors in the success of new products. The road to this success is an hourglass, it’s a matter of time until your competitor will think about the same idea of you may simultaneously release the product to the market, or just before you. A product manager must [...] […]
  Kaisemi Team
• FPGA Flexibility Vs KaiSemi Hardening August 15, 2010
  Gal Gilat Dealing with this argument my answer consists of 3 parts: 1. On the marketing aspect: This exactly the trade-off between FPGA and ASIC, where on one side FPGA is flexible, but, on the other side our ASIC replacement is much cheaper. Note that, usually, companies, that distribute final products that goes to the market in quantities, [...] […]
  Kaisemi Team
• Why switch from software DSP to ASIC? July 28, 2010
  DSP to ASIC conversion can increase the performance of the chip by several orders of magnitude – between “x3″ to “x100″ or even more, depending on the specific application. The main reason is that an ASIC chip, as a customizable and functionally flexible design, can consist of hundreds of multipliers that work concurrently thus performing [...] […]
  Kaisemi Team
• Chip Design: Why switch from FPGA to ASIC July 18, 2010
  When it comes to implementation of an integrated circuit, there are some factors that should be taken into account before choosing a design method, such as: Time-to-market – how much time do the designers have for development? Complexity of the design – amount of gates and flexible functionality Frequency of the circuit – analog or digital (or mixed), [...] […]
  Kaisemi Team
• Inherent FPGA Overhead July 13, 2010
  (Click to Enlarge) FPGAs carry much overhead which is cleaned up when converting to an ASIC. The overheads are related to the programmable nature of FPGA which causes massive waste of resources in manners of power, production, configuration, utilization and application. The spending appears as extra blocks of EPROM/Flash memory, boot loader, IOs and other so […]
  Kaisemi Team

Categories

• asic conversions
• automated chip design process
• end of life replacement
• fpga conversions
• FPGA TO ASIC
• low power fpga
• multi chip package
• Uncategorized